/**
 * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
 *
 *  SPDX-License-Identifier: Apache-2.0 OR MIT
 */
#pragma once

#include <stdint.h>
#include "soc/soc.h"
#ifdef __cplusplus
extern "C" {
#endif

/** RTCLOCKCALI_CFG0_REG register
 *  need_des
 */
#define RTCLOCKCALI_CFG0_REG (DR_REG_RTCLOCKCALI_BASE + 0x38)
/** RTCLOCKCALI_DIV_CYCLE : R/W; bitpos: [7:0]; default: 1;
 *  need_des
 */
#define RTCLOCKCALI_DIV_CYCLE    0x000000FFU
#define RTCLOCKCALI_DIV_CYCLE_M  (RTCLOCKCALI_DIV_CYCLE_V << RTCLOCKCALI_DIV_CYCLE_S)
#define RTCLOCKCALI_DIV_CYCLE_V  0x000000FFU
#define RTCLOCKCALI_DIV_CYCLE_S  0
/** RTCLOCKCALI_FULL_CNT_DONE : RO; bitpos: [8]; default: 0;
 *  need_des
 */
#define RTCLOCKCALI_FULL_CNT_DONE    (BIT(8))
#define RTCLOCKCALI_FULL_CNT_DONE_M  (RTCLOCKCALI_FULL_CNT_DONE_V << RTCLOCKCALI_FULL_CNT_DONE_S)
#define RTCLOCKCALI_FULL_CNT_DONE_V  0x00000001U
#define RTCLOCKCALI_FULL_CNT_DONE_S  8
/** RTCLOCKCALI_DIV_CALI_CNT : RO; bitpos: [24:9]; default: 0;
 *  need_des
 */
#define RTCLOCKCALI_DIV_CALI_CNT    0x0000FFFFU
#define RTCLOCKCALI_DIV_CALI_CNT_M  (RTCLOCKCALI_DIV_CALI_CNT_V << RTCLOCKCALI_DIV_CALI_CNT_S)
#define RTCLOCKCALI_DIV_CALI_CNT_V  0x0000FFFFU
#define RTCLOCKCALI_DIV_CALI_CNT_S  9
/** RTCLOCKCALI_DIV_NUMERATOR_TYPE : RO; bitpos: [25]; default: 0;
 *  need_des
 */
#define RTCLOCKCALI_DIV_NUMERATOR_TYPE    (BIT(25))
#define RTCLOCKCALI_DIV_NUMERATOR_TYPE_M  (RTCLOCKCALI_DIV_NUMERATOR_TYPE_V << RTCLOCKCALI_DIV_NUMERATOR_TYPE_S)
#define RTCLOCKCALI_DIV_NUMERATOR_TYPE_V  0x00000001U
#define RTCLOCKCALI_DIV_NUMERATOR_TYPE_S  25
/** RTCLOCKCALI_DIV_NUM : RO; bitpos: [31:26]; default: 0;
 *  need_des
 */
#define RTCLOCKCALI_DIV_NUM    0x0000003FU
#define RTCLOCKCALI_DIV_NUM_M  (RTCLOCKCALI_DIV_NUM_V << RTCLOCKCALI_DIV_NUM_S)
#define RTCLOCKCALI_DIV_NUM_V  0x0000003FU
#define RTCLOCKCALI_DIV_NUM_S  26

/** RTCLOCKCALI_CFG1_REG register
 *  need_des
 */
#define RTCLOCKCALI_CFG1_REG (DR_REG_RTCLOCKCALI_BASE + 0x3c)
/** RTCLOCKCALI_DIV_NUMERATOR : RO; bitpos: [15:0]; default: 0;
 *  need_des
 */
#define RTCLOCKCALI_DIV_NUMERATOR    0x0000FFFFU
#define RTCLOCKCALI_DIV_NUMERATOR_M  (RTCLOCKCALI_DIV_NUMERATOR_V << RTCLOCKCALI_DIV_NUMERATOR_S)
#define RTCLOCKCALI_DIV_NUMERATOR_V  0x0000FFFFU
#define RTCLOCKCALI_DIV_NUMERATOR_S  0
/** RTCLOCKCALI_DIV_DENOMINATOR : RO; bitpos: [31:16]; default: 0;
 *  need_des
 */
#define RTCLOCKCALI_DIV_DENOMINATOR    0x0000FFFFU
#define RTCLOCKCALI_DIV_DENOMINATOR_M  (RTCLOCKCALI_DIV_DENOMINATOR_V << RTCLOCKCALI_DIV_DENOMINATOR_S)
#define RTCLOCKCALI_DIV_DENOMINATOR_V  0x0000FFFFU
#define RTCLOCKCALI_DIV_DENOMINATOR_S  16

/** RTCLOCKCALI_CFG2_REG register
 *  need_des
 */
#define RTCLOCKCALI_CFG2_REG (DR_REG_RTCLOCKCALI_BASE + 0x40)
/** RTCLOCKCALI_DIV_WAIT_PWR_GOOD : R/W; bitpos: [8:0]; default: 255;
 *  need_des
 */
#define RTCLOCKCALI_DIV_WAIT_PWR_GOOD    0x000001FFU
#define RTCLOCKCALI_DIV_WAIT_PWR_GOOD_M  (RTCLOCKCALI_DIV_WAIT_PWR_GOOD_V << RTCLOCKCALI_DIV_WAIT_PWR_GOOD_S)
#define RTCLOCKCALI_DIV_WAIT_PWR_GOOD_V  0x000001FFU
#define RTCLOCKCALI_DIV_WAIT_PWR_GOOD_S  0
/** RTCLOCKCALI_DIV_SLP_VAL : R/W; bitpos: [30:15]; default: 1;
 *  need_des
 */
#define RTCLOCKCALI_DIV_SLP_VAL    0x0000FFFFU
#define RTCLOCKCALI_DIV_SLP_VAL_M  (RTCLOCKCALI_DIV_SLP_VAL_V << RTCLOCKCALI_DIV_SLP_VAL_S)
#define RTCLOCKCALI_DIV_SLP_VAL_V  0x0000FFFFU
#define RTCLOCKCALI_DIV_SLP_VAL_S  15
/** RTCLOCKCALI_DIV_TIMER_EN : R/W; bitpos: [31]; default: 0;
 *  need_des
 */
#define RTCLOCKCALI_DIV_TIMER_EN    (BIT(31))
#define RTCLOCKCALI_DIV_TIMER_EN_M  (RTCLOCKCALI_DIV_TIMER_EN_V << RTCLOCKCALI_DIV_TIMER_EN_S)
#define RTCLOCKCALI_DIV_TIMER_EN_V  0x00000001U
#define RTCLOCKCALI_DIV_TIMER_EN_S  31

/** RTCLOCKCALI_DATE_REG register
 *  Configure register.
 */
#define RTCLOCKCALI_DATE_REG (DR_REG_RTCLOCKCALI_BASE + 0x3fc)
/** RTCLOCKCALI_RTCLOCKCALI_DATE : R/W; bitpos: [30:0]; default: 38805584;
 *  need_des
 */
#define RTCLOCKCALI_RTCLOCKCALI_DATE    0x7FFFFFFFU
#define RTCLOCKCALI_RTCLOCKCALI_DATE_M  (RTCLOCKCALI_RTCLOCKCALI_DATE_V << RTCLOCKCALI_RTCLOCKCALI_DATE_S)
#define RTCLOCKCALI_RTCLOCKCALI_DATE_V  0x7FFFFFFFU
#define RTCLOCKCALI_RTCLOCKCALI_DATE_S  0
/** RTCLOCKCALI_CLK_EN : R/W; bitpos: [31]; default: 0;
 *  need_des
 */
#define RTCLOCKCALI_CLK_EN    (BIT(31))
#define RTCLOCKCALI_CLK_EN_M  (RTCLOCKCALI_CLK_EN_V << RTCLOCKCALI_CLK_EN_S)
#define RTCLOCKCALI_CLK_EN_V  0x00000001U
#define RTCLOCKCALI_CLK_EN_S  31

#ifdef __cplusplus
}
#endif
